Go to
Wayne Burleson
From Nano to Exa: Rethinking Data Representations and Data Movement
Position Statement:
Computational costs are increasingly determined by communication and precision. From lightweight clients and Internet-of-Things to data-centers and supercomputers, interconnects from the nano- to macro- levels determine the energy and latency characteristics of highly parallel computations. Computational models which are more aware of interconnection are needed in order to minimize power while satisfying performance constraints. Precise computation through 64-bit data types, floating point operations, and elaborate mathematical functions incurs enormous energy costs with only marginally improved results for many applications. Programming and design need to evolve to better account for: 1) the necessary precision of a computation, and 2) the costs of moving data. Engineering methods can be used to address both of these topics.
Wayne Burleson has been a Professor of Electrical and Computer Engineering at the University of Massachusetts Amherst since 1990. He is also currently Senior Fellow at AMD Research in Boston. He has EE degrees from MIT and the University of Colorado. He has worked as a custom chip designer and consultant in the semiconductor industry with VLSI Technology, DEC, Compaq/HP, Intel, Rambus and AMD, as well as several start-ups. Wayne was a visiting professor at ENST Paris in 1996/97, at LIRM Montpellier in 2003 and at EPFL Switzerland in 2010/11. His research is in the general area of VLSI, including circuits and CAD for low-power, interconnects, clocking, reliability, thermal effects, process variation and noise mitigation. He also conducts research in hardware security, reconfigurable computing, content-adaptive signal processing, RFID and multimedia instructional technologies. He teaches courses in VLSI Design, Embedded Systems and Security Engineering. Wayne has published over 200 refereed publications in these areas and is a Fellow of the IEEE for contributions in integrated circuit design and signal processing.
Most relevant to this talk, Wayne currently leads research in low-power design at both ends of the computing spectrum. With AMD Research, he is studying a wide variety of issues in developing future Exascale supercomputers. With UMass and in collaboration with EPFL and others, he is studying lightweight cryptography and its impact on the security and privacy of embedded systems, from payment tokens, to medical devices and more generally, the Internet of Things.
Secondary navigation
- EPFL Workshop on Logic Synthesis and Emerging Technologies
- Luca Amaru
- Luca Benini
- Giovanni De Micheli
- Srini Devadas
- Antun Domic
- Rolf Drechsler
- Pierre-Emmanuel Gaillardon
- Jie-Hong Roland Jiang
- Akash Kumar
- Shahar Kvatinsky
- Yusuf Leblebici
- Shin-ichi Minato
- Alan Mishchenko
- Vijaykrishnan Narayanan
- Ian O'Connor
- Andre Inacio Reis
- Martin Roetteler
- Julien Ryckaert
- Mathias Soeken
- Christof Teuscher
- Zhiru Zhang
- Symposium on Emerging Trends in Computing
- Layout synthesis: A golden DA topic
- EPFL Workshop on Logic Synthesis & Verification
- Luca Amaru
- Luca Benini
- Robert Brayton
- Maciej Ciesielski
- Valentina Ciriani
- Jovanka Ciric-Vujkovic
- Jason Cong
- Jordi Cortadella
- Giovanni De Micheli
- Antun Domic
- Rolf Drechsler
- Henri Fraisse
- Paolo Ienne
- Viktor Kuncak
- Enrico Macii
- Igor Markov
- Steven M. Nowick
- Tsutomu Sasao
- Alena Simalatsar
- Leon Stok
- Dirk Stroobandt
- Tiziano Villa
- Symposium on Emerging Trends in Electronics
- Raul Camposano
- Anantha Chandrakasan
- Jo De Boeck
- Gerhard Fettweis
- Steve Furber
- Philippe Magarshack
- Takayasu Sakurai
- Alberto Sangiovanni-Vincentelli
- Ken Shepard
- VENUE
- Panel on Circuits in Emerging Nanotechnologies
- Panel on Emerging Methods of Computing
- Panel on The Role of Universities in the Emerging ICT World
- Panel on Design Challenges Ahead
- Panel on Alternative Use of Silicon
- Nano-Bio Technologies for Lab-on-Chip
- Functionality-Enhanced Devices Workshop
- More Moore: Designing Ultra-Complex System-on-Chips
- Design Technologies for a New Era
- Nanotechnology for Health
- Secure Systems Design
- Surface Treatments and Biochip Sensors
- Security/Privacy of IMDs
- Nanosystem Design and Variability
- Past Events Archive