Professor
Electrical and Computer Engineering
University of Minnesota, Minneapolis, MN, USA

Measuring and enhancing the reliability of CMOS circuits

As CMOS technologies have shrunk to the scale of tens of nanometers and new paradigms such as 3D integration are being introduced, reliability has emerged as a major challenge.  This talk will discuss research that develops computer-aided design techniques for estimating and enhancing the reliability of large logic circuits, with specific emphasis on failures due to phenomena such as bias temperature instability, gate oxide breakdown, and hot carrier injection, examining problem statements and solutions for analyzing and improving performance over the entire lifetime of a chip.

About the speaker:

Sachin Sapatnekar received his Ph.D. from the University of Illinois at Urbana-Champaign in 1992.  He is currently at the University of Minnesota, where he holds the Distinguished McKnight University Professorship and the Henle Professorship in ECE. His research is related to developing CAD techniques for the analysis and optimization of circuit performance. He recently served as General Chair for the 2010 ACM/IEEE Design Automation Conference (DAC) and is currently Editor-in-Chief of the IEEE Transactions on CAD. He is a recipient of the NSF Career Award, six conference Best Paper awards, and the SRC Technical Excellence award, and is a fellow of the IEEE.