Nano-Tera Workshop*, 16-20 January 2012, EPFL BC 01

*This workshop is partly sponsored by nano-tera.ch

Organized by:
Yusuf Leblebici (EPFL) and George Stamoulis (University of Thessaly)

 

Foremost authorities in the world of semiconductor technology 
and design come together for a one week, special workshop. This is a unique 
opportunity to witness first hand the upcoming revolution in
 systems design - formal lectures interspersed with extensive
 question/answer sessions, opportunity to meet with the top 
authorities in industry, and to network with leading researchers.

This workshop intends to bring together leading academic researchers with IC and CAD industry leaders in order to pinpoint the shortcomings of the current design methodologies and CAD tools, identify new problems that may lie ahead, provide a vision of the new CAD tool capabilities that are going to be required, and crystallize everything into a new paradigm for design methodologies that fully exploits the potential of new process technologies. This workshop also aspires to become the springboard for a renewed innovation surge in EDA, which is necessary for maintaining the competitive edge and the continued growth of the entire semiconductor sector.

The unique opportunity of having industrial and academic partners address this essential issue concurrently will result in new directions not only for academic research but also for design teams that are eager to maximize the benefits of their next tapeout.

 

Lecturers:

• Luca Benini, STMicroelectronics/University of Bologna
• David Blaauw, University of Michigan
• Vivek De, Intel Corporation
  
• Larry Jones, Synopsys Inc.
• Steve Kang, University of California, Santa Cruz
• Noel Menezes, Intel Corporation
  
• Heinrich Meyr, RWTH Aachen
• John Moondanos, University of Thessaly
• Kaushik Roy, Purdue University
• Rob Roy, Atrenta Inc.
  
• Sachin Sapatnekar, University of Minnesota
  
• Costas Spanos, University of California, Berkeley
• George Stamoulis, University of Thessaly