Zhiru Zhang

Mapping-aware Logic Synthesis with Parallelized Stochastic Optimization

Assistant Professor
School of Electrical and Computer Engineering
College of Engineering
Cornell University
Ithaca, New York, USA
 

Webpage

Friday, 29 September 2017 at 9:00 in room BC 420
 

Abstract:

Modern synthesis tools typically apply a predetermined sequence of logic optimizations on the input logic network before carrying out technology mapping. While the “known recipes” of logic transformations often lead to improved mapping results, there remains a nontrivial gap between the quality metrics driving the pre-mapping logic optimizations and those targeted by the actual technology mapping.
 
In this talk I will introduce PIMap, our recent attempt to effectively and efficiently couple logic transformations and technology mapping under a parallelized iterative improvement framework. Application of PIMap on FPGA synthesis has led to very promising area savings on a set of widely used benchmarks. In addition, I will describe novel extensions to PIMap that enable statistically certified approximate logic synthesis. 
 

About the speaker:

Zhiru Zhang is an Assistant Professor in the School of Electrical and Computer Engineering at Cornell University and a member of the Computer Systems Laboratory. His research currently focuses on design automation for heterogeneous computing, including high-level synthesis, architecture and compiler optimization for hardware specialization, parallel programming for reconfigurable systems, and approximate computing substrate. His work has been recognized with an NSF CAREER Award (2015), the Ross Freeman Award for Technical Innovation from Xilinx (2012), a Best Paper Award from the ACM Transactions on Design Automation of Electronic Systems (2012), and a best paper nomination at the International Conference on Computer-Aided Design (2009).

Prior to joining Cornell, Zhang received his Ph.D. in Computer Science from the University of California, Los Angeles (UCLA). In 2006, he co-founded AutoESL Design Technologies, Inc. based on his dissertation research at UCLA on high-level synthesis. AutoESL was acquired by Xilinx in 2011 and the AutoESL tool was later rebranded as Vivado HLS; from 2011 to 2012, he served as a software development manager at Xilinx. Zhang have a B.S. in Computer Science from Peking University, and an M.S. in Computer Science from UCLA.