Kaustav Banerjee

Summer School on
Nanoelectronic Circuits and Tools
14-18 July 2008, EPFL Auditorium CO3

/webdav/site/si/shared/K Banerjee.jpgProfessor
Department of Electrical and Computer Engineering
University of California, Santa Barbara, CA - US
A
Webpage



 

 

 

Lecture 1: Thursday, 17 July 2008 (10h00-11h00) CO3

Carbon Nanotube Interconnects for Next Generation ICs - Part I

This lecture will highlight the issues and challenges related to nanoscale copper interconnects that is leading the search for new alternative materials. It will also provide a detailed introduction to carbon nanotubes (CNTs) and their attractive properties that make them a likely candidate to replace copper. It will also discuss the physical interpretation of resistance, capacitance and inductance in a CNT bundle and provide an overview of the state-of-the-art in the fabrication of single and multi-walled metallic CNT-bundle interconnects.


Lecture 2: Wednesday, 16 July 2008 (11h15-12h15) CO3

Carbon Nanotube Interconnects for Next Generation ICs - Part II

This lecture will discuss the state-of-the-art in CNT interconnect modeling and provide comparisons of their performance with respect to copper interconnects. It will present equivalent circuit models for both single and multi-walled CNT bundles and their delay analysis. High-frequency effects and their implications will be discussed in detail. Moreover, electro-thermal issues in CNT interconnects will be analyzed. Finally, some possible applications of CNT interconnects will be discussed.



About the speaker:
Kaustav Banerjee is a Professor of Electrical and Computer Engineering at the University of California-Santa Barbara, where he directs the Nanoelectronics Research Lab and is an affiliated faculty of the California Nanosystems Institute.

After receiving his Ph.D. in Electrical Engineering and Computer Sciences from UC Berkeley in 1999, he was with Stanford University as a Research Associate at the Center for Integrated Systems. His present research interests focus on nanometer scale issues in VLSI as well as on circuits and systems issues in emerging nanoelectronics. His research has been chronicled in over 150 journal and refereed international conference papers.  He has also received a numerous awards and honors in recognition of his work, including a Best Paper Award at the Design Automation Conference (2001), the ACM SIGDA Outstanding New Faculty Award (2004), a Research Award from the Electrostatic Discharge Association (2005), an IEEE-Micro Top Picks Award (2006), and an IBM Faculty Award (2008).