Professor and Chair of Electrical Engineering and Computer Sciences
University of California at Berkeley, California, USA

Capturing, Modeling and Leveraging Process Variability in IC Design

IC variability has a hierarchical/hybrid character. Its hierarchy reflects the nature of production which can be viewed at the device, chip, field, wafer, and wafer-lot levels. Its hybrid nature encompasses spatial, deterministic and random components. Finally, its sources can be traced to interactions between layout components, modeling and manufacturing imperfections, as well as fundamental randomness at the atomistic scale. Consequently, capturing IC variability requires a concerted effort of test pattern design, data collection and TCAD simulations. This should lead to a complete, yet parsimonious statistical model, which can in turn provide suitable design guidance in order to ensure the optimal balance between yield and performance. This presentation will focus on the structure, characterization and use of such a comprehensive IC variability model, and it will include applications on compact transistor model characterization, custom corner generation, variability propagation at the circuit level, and yield-constrained IC performance optimization.

About the speaker:

Costas J. Spanos received the Electrical Engineering Diploma from the National Technical University of Athens, Greece in 1980 and the M.S. and Ph.D. degrees in Electrical and Computer Engineering from Carnegie Mellon University in 1981 and 1985, respectively. From 1985 to 1988 he was with the advanced Computer-Aided Design group of Digital Equipment Corporation, where he worked on the statistical characterization, simulation and diagnosis of VLSI processes.

In 1988 he joined the faculty at the department of Electrical Engineering and Computer Sciences of the University of California at Berkeley, where he is now a Professor and Chair of the department. He was the Director of the Berkeley Microfabrication Laboratory from 1994 to 2000, the Director of the Electronics Research Laboratory from 2004 to 2005, and the Associate Dean for Research in the College of Engineering from 2004 to 2008.

Professor Spanos has served in the technical committees of numerous conferences and was the editor of the IEEE Transactions on Semiconductor Manufacturing from 1991 to 1994. He has published more than 200 referred articles, has received several best paper awards and has co-authored a textbook in semiconductor manufacturing. His present research interests include the application of statistical analysis in the design and fabrication of integrated circuits, and the development and deployment of novel sensors and computer-aided techniques in semiconductor manufacturing. In 2000 he was elected Fellow of the Institute of Electrical and Electronic Engineers for contributions and leadership in semiconductor manufacturing.