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Srini Devadas
Towards Security without Secrets
Professor
Computer Structures Group
Electrical Engineering and Computer Science, MIT
Cambridge, Massachusetts, USA
Keynote - Thursday, 28 September 2017 at 9:50 in room BC 420
Abstract:
Physical Unclonable Functions (PUFs) are a promising new cryptographic primitive that leverage manufacturing variation to create unclonable secrets in embedded systems. In this case, the secret is no longer stored permanently in digital form, but rather as the physical properties of the manufactured chip. Further, the recent proposal of “Public Model Physical Unclonable Functions” (PPUFs) does not contain any secrets at all. Instead, PPUFs propose to use a constant-factor computational speedup to distinguish an unclonable hardware device from a digital simulation.
This talk proposes a formalism describing Public Model Physical Unclonable Functions based on ordinary differential equations (ODEs), a conjecture on the form of ODE integrators, and a formal reduction of PPUF security to this conjecture. Finally, this talk provides direction for implementing a PPUF.
About the speaker:
Srini Devadas is the Webster Professor of Electrical Engineering and Computer Science and has has been on the MIT EECS faculty since 1988. He served as Associate Head of the Department of Electrical Engineering and Computer Science, with responsibility for Computer Science, from 2005 to 2011.
Devadas's research interests span Computer-Aided Design (CAD), computer security and computer architecture and he has received significant awards from each discipline. In 2015, he received the ACM/IEEE A. Richard Newton Technical Impact award in Electronic Design Automation. He received the IEEE Computer Society Technical Achievement Award in 2014 for inventing Physical Unclonable Functions and single-chip secure processor architectures. Devadas's work on hardware information flow tracking published in the 2004 ASPLOS received the ASPLOS Most Influential Paper Award in 2014. His papers on analytical cache modeling and the Aegis single-chip secure processor were included as influential papers in "25 Years of the International Conference on Supercomputing." In 2017 he received the IEEE W. Wallace McDowell Award for contributions to secure hardware. He is an IEEE and ACM Fellow.
Devadas has taught widely in EECS, lecturing classes in VLSI, discrete mathematics, computer architecture, algorithms and software engineering. He is a MacVicar Faculty Fellow and an Everett Moore Baker teaching award recipient, considered MIT's two highest undergraduate teaching honors.
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- EPFL Workshop on Logic Synthesis and Emerging Technologies
- Luca Amaru
- Luca Benini
- Giovanni De Micheli
- Srini Devadas
- Antun Domic
- Rolf Drechsler
- Pierre-Emmanuel Gaillardon
- Jie-Hong Roland Jiang
- Akash Kumar
- Shahar Kvatinsky
- Yusuf Leblebici
- Shin-ichi Minato
- Alan Mishchenko
- Vijaykrishnan Narayanan
- Ian O'Connor
- Andre Inacio Reis
- Martin Roetteler
- Julien Ryckaert
- Mathias Soeken
- Christof Teuscher
- Zhiru Zhang
- Symposium on Emerging Trends in Computing
- Layout synthesis: A golden DA topic
- EPFL Workshop on Logic Synthesis & Verification
- Luca Amaru
- Luca Benini
- Robert Brayton
- Maciej Ciesielski
- Valentina Ciriani
- Jovanka Ciric-Vujkovic
- Jason Cong
- Jordi Cortadella
- Giovanni De Micheli
- Antun Domic
- Rolf Drechsler
- Henri Fraisse
- Paolo Ienne
- Viktor Kuncak
- Enrico Macii
- Igor Markov
- Steven M. Nowick
- Tsutomu Sasao
- Alena Simalatsar
- Leon Stok
- Dirk Stroobandt
- Tiziano Villa
- Symposium on Emerging Trends in Electronics
- Raul Camposano
- Anantha Chandrakasan
- Jo De Boeck
- Gerhard Fettweis
- Steve Furber
- Philippe Magarshack
- Takayasu Sakurai
- Alberto Sangiovanni-Vincentelli
- Ken Shepard
- VENUE
- Panel on Circuits in Emerging Nanotechnologies
- Panel on Emerging Methods of Computing
- Panel on The Role of Universities in the Emerging ICT World
- Panel on Design Challenges Ahead
- Panel on Alternative Use of Silicon
- Nano-Bio Technologies for Lab-on-Chip
- Functionality-Enhanced Devices Workshop
- More Moore: Designing Ultra-Complex System-on-Chips
- Design Technologies for a New Era
- Nanotechnology for Health
- Secure Systems Design
- Surface Treatments and Biochip Sensors
- Security/Privacy of IMDs
- Nanosystem Design and Variability
- Past Events Archive
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Venue
All talks will take place at EPFL room BC 420. Please click here to go to the interactive EPFL map.