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Steve Kang
SOE Distinguished Chair Professor
Department of Electrical Engineering
University of California, Santa Cruz, CA, USA
Chancellor Emeritus, UC Merced, CA, USA
The Early Days of CMOS VLSI Design and CAD; Back to the Future
About the Speaker:
Sung-Mo "Steve" Kang received his B.S. (Summa Cum Laude) degree from Fairleigh Dickinson University, Teaneck, NJ in 1970, M.S. degree from the State University of New York at Buffalo in 1972, and Ph.D. from the University of California at Berkeley in 1975, all in electrical engineering. From March 2007 to June 2011, he has served as Chancellor and Professor of Engineering at UC Merced. He has also served on the California Council of Science and Technology, UC President's Science and Technology Board, Central Valley Higher Education Consortium Board, MentorNet Advisory Board, and as Chairman of the Board of the Great Valley Center.
From Jan. 2001 to Feb. 2007, he was Dean of Baskin School of Engineering and Professor of Electrical Engineering at the University of California at Santa Cruz. From July 2002 to June 2003, he served as President of Silicon Valley Engineering Council (www.svec.org). From 2002 to 2004, he was a Chaired Visiting Professor of Electrical Engineering and Computer Science of Korea Advanced Institute of Science and Technology (KAIST).
From August 1995 to December 2000, he was Head of the Department of Electrical and Computer Engineering. From August 1985 to December 2000, he was Professor of Electrical and Computer Engineering, Computer Science and Research Professor of Coordinated Science Laboratory and Beckman Institute for Advanced Science and Technology of the University of Illinois at Urbana-Champaign. He was named the first Charles Marshall Senior University Scholar, an Associate in the Center for Advanced Study, and has served as the Founding Director of Center for ASIC Research and Development, and Associate Director of NSF Engineering Research Center for Compound Semiconductor Microelectronic at the University of Illinois at Urbana-Champaign. He was a Visiting Professor at the Swiss Federal Institute of Technology at Lausanne in 1989, at the University of Karlsruhe in 1997 and at the Technical University of Munich in 1998.
Until 1985 he was with AT&T Bell Laboratories at Murray Hill and Holmdel, and also served as a faculty member of Rutgers University. He led the development of world's first full 32-bit CMOS microprocessor chips and their peripheral chips as supervisor of high-end microprocessor design group. These chips were manufactured for AT&T's high-end switching machines such as 3B5 and 3B20 and also AT&T computers. For his outstanding leadership in both development and later manufacturing of these chips, he was awarded an exceptional contribution award. In early phase of his Bell Labs career, he designed satellite-based private networks using statistical traffic analysis and nonlinear optimization.
His current research interests include memristors, memristive devices and systems, low power VLSI design; optimization for performance, reliability and manufacturability; mixed-signal mixed-technology integrated system; modeling and simulation of semiconductor devices and circuits; high-speed optoelectronic circuits, fully optical network systems, and nanobioelectronics.
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- EPFL Workshop on Logic Synthesis and Emerging Technologies
- Luca Amaru
- Luca Benini
- Giovanni De Micheli
- Srini Devadas
- Antun Domic
- Rolf Drechsler
- Pierre-Emmanuel Gaillardon
- Jie-Hong Roland Jiang
- Akash Kumar
- Shahar Kvatinsky
- Yusuf Leblebici
- Shin-ichi Minato
- Alan Mishchenko
- Vijaykrishnan Narayanan
- Ian O'Connor
- Andre Inacio Reis
- Martin Roetteler
- Julien Ryckaert
- Mathias Soeken
- Christof Teuscher
- Zhiru Zhang
- Symposium on Emerging Trends in Computing
- Layout synthesis: A golden DA topic
- EPFL Workshop on Logic Synthesis & Verification
- Luca Amaru
- Luca Benini
- Robert Brayton
- Maciej Ciesielski
- Valentina Ciriani
- Jovanka Ciric-Vujkovic
- Jason Cong
- Jordi Cortadella
- Giovanni De Micheli
- Antun Domic
- Rolf Drechsler
- Henri Fraisse
- Paolo Ienne
- Viktor Kuncak
- Enrico Macii
- Igor Markov
- Steven M. Nowick
- Tsutomu Sasao
- Alena Simalatsar
- Leon Stok
- Dirk Stroobandt
- Tiziano Villa
- Symposium on Emerging Trends in Electronics
- Raul Camposano
- Anantha Chandrakasan
- Jo De Boeck
- Gerhard Fettweis
- Steve Furber
- Philippe Magarshack
- Takayasu Sakurai
- Alberto Sangiovanni-Vincentelli
- Ken Shepard
- VENUE
- Panel on Circuits in Emerging Nanotechnologies
- Panel on Emerging Methods of Computing
- Panel on The Role of Universities in the Emerging ICT World
- Panel on Design Challenges Ahead
- Panel on Alternative Use of Silicon
- Nano-Bio Technologies for Lab-on-Chip
- Functionality-Enhanced Devices Workshop
- More Moore: Designing Ultra-Complex System-on-Chips
- Design Technologies for a New Era
- Nanotechnology for Health
- Secure Systems Design
- Surface Treatments and Biochip Sensors
- Security/Privacy of IMDs
- Nanosystem Design and Variability
- Past Events Archive
Registration
Please note that paid registration is required for all participants of the workshop.
The full registration fee of 1200 € includes:
- Attendance to all lectures
- Printed and soft copy lecture notes
- Daily lunch with instructors
- All coffee breaks
- One social event (gala dinner)
Please click HERE to fill the online registration form.
Members of EPFL/ETHZ are offered a reduced rate for registration. EPFL/ETHZ members please click HERE to register.
For further information, you may contact Ms. Melinda Mischler by fax (+41 21 693 69 59) or e-mail (melinda.mischler@epfl.ch).