Thomas Ernst

Position statement:

From integrated circuits to integrated systems

Today, most of the IC technology industrial investments, concentrated by a handful of giant companies are focused on the continuation on the fifty year old CMOS technology dimension scaling. However, some old schemes run out of steam. In particular, optical lithography becomes a main economical and physical showstopper, and, as a consequence, the cost per transistor is not reduced anymore for the most advanced nodes.

In this context, will technological innovation open new roads below 10nm or create new generations of multifunctional IC? By successfully focusing on circuit dimension scaling benefits for decades, IC technology research have lost sight of many possible parallel fields of investigation to decrease consumption or to add value by heterogeneous integrations. In particular new types of nanodevices and memories, ultra-dense 3D, emerging nano-materials, embedded sensors will be the technological basis for novel generations of integrated systems.

About the panel member:

Thomas Ernst is scientific director for the silicon components and technologies group at CEA LETI. He received his Ph.D. degrees from the National Polytechnics Institute of Grenoble. From 1997 to 2000, he developed advanced SOI CMOS electrical characterization, simulation and modelling methods with STMicroelectronics. He then joined CEA-LETI to develop novel strained-channel CMOS architectures for 32 nm technology. In particular, he was leading strained SOI, strained Germanium, and SiGeOI CMOS integration at Leti. He then led the 3D nanowire CMOS devices developments. His expertise covers the areas of novel CMOS devices fabrication technology and MOSFETs, analytical modelling, electrical characterization, nanowire 3D flash memory, nanowire-based NEMS and sensing devices. He is now developing nanowire NEMS sensors in VLSI CMOS environment. Dr. Ernst is author or co-author of over 170 technical journal papers and communications at international conferences on CMOS devices integration, modelling, characterization, NEMS-CMOS co-integration. He is author or co-author of 20 patents. He is a member of ESSDERC and VLSI technology symposium, ICICDT technical committees and member of the IEDM executive committee as European chair. He is a recipient of research grant from the European Research Council (ERC) to develop multi-physics integrated systems.