Position statement:

Ultra-low power computational sensing for next generation "Internet of Everything" platforms

The  "internet of everything" envisions trillions of connected objects loaded with high-bandwidth sensors (imagers, large physio/bio sensing arrays, ...) and powered by small batteries and/or by micro-energy harvesters.  These "smart things" require massive amounts of local signal processing, fusion, pattern extraction and classification,  coupled with advanced multi-standard/multi-mode communication capabilities. Higher level intelligence, requiring local storage and complex search and matching algorithms, will come next, ultimately leading to situational awareness and truly "intelligent things".

From the computational viewpoint, the challenge is formidable and can be addressed only by pushing computing fabrics toward massive parallelism and brain-like energy efficiency levels. We believe that CMOS technology can still take us a long way toward this vision and our recent results with the PULP (parallel ultra-low power) open computing platform demonstrate that pj/OP (GOPS/mW) computational efficiency is within reach in today's 28nm CMOS FDSOI technology. In the longer term, looking toward the next 1000x of energy efficiency improvement, but we will need to fully exploit the flexibility of heterogeneous 3D integration,  stop being religious about analog vs. digital, Von Neumann vs. "new" computing paradigms, and seriously look into relaxing traditional "hardware-software contracts" such as numerical precision and error-free permanent storage.
 

About the panel member:

Luca Benini is the chair of digital Circuits and systems at ETHZ and a Full Professor at University of Bologna.

Dr. Benini's research interests are in energy-efficient system design and Multi-Core SoC design.  He is also active in the area of energy-efficient smart sensors and sensor networks for  biomedical and ambient intelligence applications. In these fields he  published more than 600 papers in peer-reviewed  international journals and conferences, four books and several book chapters.

He worked as a research scientist in Hewlett-Packard Laboratories (Palo Alto, CA),  has served in 2009-2013 as chief architect in STMicroelectronics (Grenoble, FR) and he has been member of the steering board of the ARTEMISIA European Association on Advanced Research & Technology for Embedded Intelligence and Systems. He is a Fellow of the IEEE and a member  of the Academia Europaea.