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Rob Roy
Chief of Business Development
Atrenta Inc
San Jose, California, USA
Can Higher-Level Abstraction Help in Crossing the Brick Wall of Complexity?
This talk will address the technological as well business challenges associated with Brick Wall of Complexity. While technological solutions are absolutely critical, businesses - from design houses to EDA tool provides to fabs - have to run viable businesses to enable the treadmill of progress in producing increasingly complex and "cool" products like the iPhone and iPad. The cost of designing and fabricating a new System of a Chip (SoC) has become so prohibitive that a single failed chip can cause the end of a small company. Time-to-market and design complexity challenges are well-known; as seen in the multitude of statistics and predictions. A well-defined strategy to address these challenges in SoC design seems less clear. Design for manufacturability approaches that optimize transistor geometries, "variability aware" physical implementation tools and design reuse strategies abound. While each of these techniques contributes to the solution, they all miss the primary force of design evolution. Over the past 30 years or so, it has been proven time and again that moving design abstraction to the next higher level is required if design technology is to advance. In this presentation, critical design challenges including power, timing, testability, and verification will be addressed and some promising solutions using higher level of abstraction will be presented. An effort will be made to draw some lessons from the past to predict a roadmap to the future.
About the speaker:
Dr. Rob Roy is a well-recognized entrepreneur in the fields of wireless and VLSI system design. Previously, he was VP of Business Development at SAI Technology, Chief Strategist at Wi2Wi and a senior executive at Avnera, a fabless semiconductor company. He was also a Co-Founder and Chief Technology Strategist at Mobilian Corporation, an advanced wireless connectivity company, which was acquired by Intel Corporation in September 2003. Dr. Roy has also held executive positions at Zenasis Technologies, which was acquired by Open-Silicon in May 2007, and Redpine Signals, where he was the interim CEO. His previous experience includes engineering and management positions at Intel, NEC, and AT&T Bell Labs. He has published extensively in refereed journals and international conferences, and has been awarded three Best Paper Awards. He holds 15 patents. He received his B.Tech (Hons) degree in Electronics & Electrical Communication Engineering from Indian Institute of Technology and earned his M.S. and Ph.D. in Electrical & Computer Engineering from University of Illinois at Urbana-Champaign.
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Registration
Please note that paid registration is required for all participants of the workshop.
The full registration fee of 1200 € includes:
- Attendance to all lectures
- Printed and soft copy lecture notes
- Daily lunch with instructors
- All coffee breaks
- One social event (gala dinner)
Please click HERE to fill the online registration form.
Members of EPFL/ETHZ are offered a reduced rate for registration. EPFL/ETHZ members please click HERE to register.
For further information, you may contact Ms. Melinda Mischler by fax (+41 21 693 69 59) or e-mail (melinda.mischler@epfl.ch).