Assistant Professor
Department of Electrical Engineering
University of California, Los Angeles, CA - USA
Webpage

Under-designed and Opportunistic Computing Machines

Scaling of physical dimensions faster than the optical wavelengths or equipment tolerances used in the manufacturing line has led to increased process variability and low yields which make design process expensive and unpredictable. "Equivalent scaling" improvements - perhaps as much as one full technology generation, can come from looking "up" to circuit design and even to software (operating systems, compilers and applications). We argue for underdesigned and opportunistic computing which offloads some of the variability handling burden to higher layers in the hardware-software stack. With examples from multimedia and sensor processing, I will show that a fluid hardware-software interface can result in substantial improvements in power, yield and application quality. At the same time, I will show a "negative" example highlighting why dynamic reliability management may not be very useful.


About the speaker:

Puneet Gupta  is currently a faculty member of the Electrical Engineering Department at UCLA. He received the B.Tech degree in Electrical Engineering from Indian Institute of Technology, Delhi in 2000 and Ph.D. in 2007 from University of California, San Diego. He co-founded Blaze DFM Inc. (acquired by Tela Inc.) in 2004 and served as its product architect till 2007.

He has authored over 60 papers, ten U.S. patents, and a book chapter. He is a recipient of NSF CAREER award, ACM/SIGDA Outstanding New Faculty Award, European Design Automation Association Outstanding Dissertation Award and IBM Ph.D. fellowship. Dr. Puneet Gupta has given tutorial talks at DAC, ICCAD, Intl. VLSI Design Conference and SPIE Advanced Lithography Symposium. He has served on the Technical Program Committee of DAC, ICCAD, ASPDAC, ISQED, ICCD, SLIP and VLSI Design. He served as the Program Chair of IEEE DFM&Y Workshop 2009, 2010.

Dr. Gupta's research has focused on building high-value bridges across application-architecture-implementation-fabrication interfaces for lowered cost and power, increased yield and improved predictability of integrated circuits and systems.