Go to
Heinrich Meyr
Professor
Institute for Integrated Signal Processing Systems
RWTH Aachen University of Technology, Germany
Visiting Professor
Integrated Systems Laboratory
Swiss Federal Institute of Technology, Lausanne, Switzerland
Webpage
Telecommunications in the Deep Submicron Regime
In the past, technology scaling has been the enabling factor behind the realization of bandwidth efficient, high throughput telecommunication systems. Better deep submicron process technologies have not only been key to provide sufficient computational resources at low cost for complex algorithms, but they have also been instrumental in achieving good energy efficiency. Extrapolating from the past, it is widely assumed in the telecommunications industry that future technologies will continue to provide solutions to problems in the design of communication transceivers. Unfortunately, the difficulties encountered in submicron processes render the future of telecommunication circuits less clear.
In this talk, we first point out the limitations of technology scaling and relate them to the design and limitations of future telecommunication systems. Considering variability and reliability issues of emerging technologies, we then turn the problem around and ask the question, how nowadays ideas from telecommunication may help to solve problems encountered in deep submicron process technologies. In particular, we are interested in exploring, how the inherent fault-tolerance in communication systems and the increasing demand for flexibility and reconfigurability on the communication side (e.g., “Software Defined-Radio” or “Cognitive Radio”) may naturally extend the lifetime of CMOS technology beyond the limit of 100% reliable circuits.
About the speakers:
Dr. Meyr received his M.Sc. and Ph.D. from ETH Zurich, Switzerland. He spent over 12 years in various research and management positions in industry before accepting a professorship in Electrical Engineering at Aachen University of Technology (RWTH Aachen) where he founded the Institute for Integrated Signal Processing Systems. In 2007 he has assumed the rank of emeritus. Presently Dr. Meyr is a visiting professor at the LSI of EPFL.
During the last thirty years, Dr. Meyr has worked extensively in the areas of communication theory, digital signal processing and CAD tools for system-level design. His present research interest is in algorithm and architecture design for wireless systems
Dr. Meyr has a dual career as entrepreneur. He has founded several successful companies. The last company he has cofounded in 2001 was LisaTek which merged with CoWare in 2003. In 2010 CoWare was acquired by Synopsys.
Andreas Burg was born in Munich, Germany, in 1975. He received his Dipl.‐Ing. degree in 2000 from the ETH Zurich. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006. In 1998, he worked at Siemens Semiconductor (i.e., Infineon), San Jose, CA. During his doctoral studies, he was an intern at Bell Labs Wireless Research for a total of one year.
From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Technology Laboratory of the ETH Zurich. In 2007 he co‐founded Celestrius, an ETH spinoff in the field of MIMO wireless communication, where he served as the Director for VLSI from 2007 to 2008. In 2008, Dr. Burg was awarded a Professorship from the Swiss National Science Foundation (SNF) on which joined the ETH Zurich in the rank of an Assistant Professor in January 2009. At ETH he is heading the Signal Processing Circuits and Systems Group at the Integrated Systems Laboratory. He has joined EPFL as an Tenure Track Assistant Professor heading the Telecommunications Circuits Laboratory (TCL) since January 2011.
Secondary navigation
- EPFL Workshop on Logic Synthesis and Emerging Technologies
- Luca Amaru
- Luca Benini
- Giovanni De Micheli
- Srini Devadas
- Antun Domic
- Rolf Drechsler
- Pierre-Emmanuel Gaillardon
- Jie-Hong Roland Jiang
- Akash Kumar
- Shahar Kvatinsky
- Yusuf Leblebici
- Shin-ichi Minato
- Alan Mishchenko
- Vijaykrishnan Narayanan
- Ian O'Connor
- Andre Inacio Reis
- Martin Roetteler
- Julien Ryckaert
- Mathias Soeken
- Christof Teuscher
- Zhiru Zhang
- Symposium on Emerging Trends in Computing
- Layout synthesis: A golden DA topic
- EPFL Workshop on Logic Synthesis & Verification
- Luca Amaru
- Luca Benini
- Robert Brayton
- Maciej Ciesielski
- Valentina Ciriani
- Jovanka Ciric-Vujkovic
- Jason Cong
- Jordi Cortadella
- Giovanni De Micheli
- Antun Domic
- Rolf Drechsler
- Henri Fraisse
- Paolo Ienne
- Viktor Kuncak
- Enrico Macii
- Igor Markov
- Steven M. Nowick
- Tsutomu Sasao
- Alena Simalatsar
- Leon Stok
- Dirk Stroobandt
- Tiziano Villa
- Symposium on Emerging Trends in Electronics
- Raul Camposano
- Anantha Chandrakasan
- Jo De Boeck
- Gerhard Fettweis
- Steve Furber
- Philippe Magarshack
- Takayasu Sakurai
- Alberto Sangiovanni-Vincentelli
- Ken Shepard
- VENUE
- Panel on Circuits in Emerging Nanotechnologies
- Panel on Emerging Methods of Computing
- Panel on The Role of Universities in the Emerging ICT World
- Panel on Design Challenges Ahead
- Panel on Alternative Use of Silicon
- Nano-Bio Technologies for Lab-on-Chip
- Functionality-Enhanced Devices Workshop
- More Moore: Designing Ultra-Complex System-on-Chips
- Design Technologies for a New Era
- Nanotechnology for Health
- Secure Systems Design
- Surface Treatments and Biochip Sensors
- Security/Privacy of IMDs
- Nanosystem Design and Variability
- Past Events Archive
Registration
Registration is free of charge. Please send an e-mail with subject line "Nanosystem Design and Variability" to anil.leblebici@epfl.ch to register. Make sure to state your full name and affiliation.