2006 - 2007 Seminars

Aug 31, 2007
15h15
Temperature & Power Aware Schedulers for MPSoCs

Tajana Simunic Rosing
Department of Computer Science and Engineering, University of California at San Diego, CA, USA

Jun 29, 2007  
11h00
Fault-Tolerant MultiLevel-Logic Decoder for Nanoscale Crossbar Memory Arrays

Haykel Ben Jamaa
Integrated Systems Laboratory, Swiss Federal Institute of Technology, Lausanne

Jun 20, 2007
17h15
High Resolution Neuro-Electronic Interface System for Electrophysiological Experiments

Neil Joye
Microelectronic Systems Laboratory, Swiss Federal Institute of Technology, Lausanne

Jun 5, 2007
15h00
Can We Teach Computers to Write Fast Libraries?

Marcus Püschel
Department of Electrical and Computer Engineering, Carnegie-Mellon University, Pittsburg, PA,
USA

May 30, 2007
17h15
Controlling and Exploiting Self-Assembly of Micro/ Nanosystems using Microdroplets

Grégory Mermoud
Swarm-Intelligent Systems Group (SWIS), Swiss Federal Institute of Technology, Lausanne

May 16, 2007
16h15
Queuing Theory, Network Connections and Street Junctions

Francesco Zanini
Advanced Learning and Research Institute, University of Lugano, Lugano, Switzerland

May 15, 2007
15h00
Generic scavenger powered DSP-based System-on-Chip for emerging implantable Biosensors and Bioactuators

Léandre Bolomey
Laboratory of Microengineering for Manufacturing 2 (LPM2), Swiss Federal Institute of Technology, Lausanne

Apr 24, 2007
17h15
Temperature Aware Task Scheduling in MPSoCs

Ayse Kivilcim Coskun
Computer Science and Engineering Department, University of California, San Diego, CA, USA

Mar 27, 2007
11h00
Biolithography: DNA-assisted Manufacturing of Nanodevices for Optical and Electronic Biosensing

Janos Vörös
Laboratory of Biosensors and Bioelectronics, Swiss Federal Institute of Technology, Zurich, Switzerland

Mar 14, 2007
16h15
Energy Recovery VLSI

Marios Papaefthymiou
Advanced Computer Architecture Laboratory, Electrical Engineering and Computer Science Department, University of Michigan, Ann Arbor, MI, USA

Feb 9, 2007
16h15
Multi-Processor Operating System Emulation Framework with Thermal Feedback for
Systems-on-Chip

David Atienza
Integrated Systems Laboratory (LSI), Swiss Federal Institute of Technology, Lausanne

Feb 8, 2007
17h15
Design of nanometer MOS Current Mode Logic (MCML): basic concepts and perspectives

Massimo Alioto
Department of Computer Engineering, University of Siena, Siena, Italy

Jan 12, 2007
11h00
Towards a Trusted IC Life-Cycle

Berk Sunar
Department of Electrical and Computer Engineering, WPI, Worcester, MA, USA

Dec 5, 2006
14h30
Application-Specific Design Customization for Network-on-chip Architectures

Gianluca Palermo
Department of Electronics and Information Technology, Politechnical University of Milan, Milan,
Italy

Nov 14, 2006
17h15
System-Level Middleware for Systems on Chip

Fernando Rincón
School of Computer Science, University of Castilla-La Mancha, Ciudad Real, Spain

Oct 31, 2006
17h15
Energy harvesting for sensor nodes: design, simulation and implementation

Alex Susu
Integrated Systems Laboratory (LSI), Swiss Federal Institute of Technology, Lausanne

Oct 27, 2006
14h15
Macro- and Bio-Molecular Interfaces

Rudy Schlaf
Department of Electrical Engineering, University of South Florida, Tampa, FL, USA

Oct 26, 2006
17h15
CMOS-Based Microsystems for Chemical and Biological Applications

Diego Barrettino
Integrated Systems Laboratory (LSI), Swiss Federal Institute of Technology, Lausanne

Oct 20, 2006
14h00
Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits

Kunal Ghosh
Department of Electrical Engineering, Stanford University, Palo Alto, CA, USA

Sep 20, 2006
17h15
Low-power multimedia signal processing for embedded systems

Michael Ansorge
Electronics and Signal Processing Laboratory, University of Neuchâtel, Neuchâtel, Switzerland

Sep 20, 2006
11h15
Software Defined Radio - A High Performance Embedded Challenge

Trevor Mudge
Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor,
MI, USA

Sep 20, 2006
10h15
Communications-Inspired Design of Nanometer SoCs

Naresh Shanbhag
Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, IL,
USA

Sep 19, 2006
17h30
A 5 Ghz+ 128-bit Binary Floating-Point Adder for the POWER6 Processor

Xiao Yan Yu
University of California, Davis, CA, USA