October 5, 2005

A Case Study of Mobile SoC Architecture Design Based on Transaction-Level Modeling

Eui-Young Chung, Associate Professor at Yonsei University, Seoul, Korea

Abstract: Rapid growth of the mobile application market is strongly driving the semiconductor industry for a cost-effective chip solution. Meanwhile, the design complexity of mobile SoC is rapidly increasing due to high-throughput data processing capability demands.

In this talk, we are presenting a case study of mobile SoC architecture design aiming at supporting high-throughput data processing requirements with reduced design effort. For this purpose, we adopt a Transaction-Level Modeling (TLM) method for fast and accurate system architecture exploration, especially focusing on system on-chip communication architecture. Using this method, we could easily identify the design bottlenecks from many architectural choices and improve and verify the architecture in the early design stage, which in turn reduces the overall design iteration time.


About the speaker: Eui-Young Chung recieved his BS and MS degrees from Korea University, his PhD degree from Stanford University in 1988, 1990, and 2002 respectively. He has worked as principal engineer in Samsung Electronics between 1990 - 2002. Currently, he is an associate professor at Yonsei University, Seoul, Korea.

Chung's research interests include system architecture design and methodology, low power design, VLSI CAD.

Download visuals (344 kB pdf)