Multi-Processor Operating System Emulation Framework with Thermal Feedback for Systems-on-Chip

David Atienza, Integrated Systems Laboratory, EPFL-IC-LSI, Lausanne

Abstract: Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power density, which may lead to thermal runaway if coupled with low-cost packaging and cooling. Hence, mechanisms to efficiently evaluate the effectiveness of advanced thermal-aware operating-system (OS) strategies (e.g. task migration) onto the available MPSoC hardware are needed.

In this talk we present a new MPSoC OS emulation framework that enables the study of thermal management strategies at the architectural- and OS-levels with the help of a standard FPGA. This framework includes the hardware and software components needed to accurately model complex MPSoCs architectures, and to test the effects of run-time thermal management strategies at the OS/middleware level with real-life inputs. Our results show that migration overhead is negligible with respect to temperature timings, enabling the development of thermal-aware migration strategies. Moreover, the effectiveness of the monitoring and feedback mechanism provides an emulation performance only ten times slower than real time.

About the speaker: David Atienza Alonso, PhD, is Post-Doc at the Integrated Systems Laboratory (LSI) at Ecole Polytechnique Federale de Lausanne (EPFL), Switzerland. He also holds the position of invited Assistant Professor at the Computer Architecture and Automation Department (DACYA) of Complutense University of Madrid (UCM), Spain. Also, he is currently scientific counselor of long-time research at the Digital Design Technology (DDT) Group of Inter-University Micro-Electronics Center (IMEC), Leuven, Belgium.

His research interests include several aspects of design technologies for integrated circuits and systems, with particular emphasis on scalable interconnection paradigms for multi-Processors System-on-Chip: Networks-On-Chip (NoC), dynamic memory management, system-level design and low-power design.