Behavioral Transformations and Verification using Canonical Taylor Expansion Diagrams

Maciej Ciesielski, Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA-USA

Abstract: This talk introduces Taylor Expansion Diagrams (TED), a canonical, graph-based representation with applications to verification and synthesis of designs specified on behavioral level.

Due to their canonical property, TEDs can be used for equivalence checking of designs specified on high (algorithmic or behavioral) level, written in C, system C or behavioral HDL. They can also serve as an efficient vehicle to perform transformations of an initial design specification prior to "high-level" (architectural) synthesis. As a canonical functional representation, TED can capture an entire class of structural solutions (data flow graphs, DFG), rather than a single DFG. Through a unique graph-based decomposition procedure, involving factorization, common subexpression extraction, and simplification, TED can be converted into a DFG that is best suited for a particular design objective (latency, area, etc). Such constructed DFG provides a better starting point for architectural synthesis that those derived directly from the initial design specifications.

An experimental software system, TDS, is currently under development at the University of Massachusetts, Amherst. It is available for free download by clicking here.

About the speaker: Maciej Ciesielski is Professor in the Department of Electrical & Computer Engineering (ECE) at the University of Massachusetts, Amherst. He received M.S. in Electrical Engineering from Warsaw Technical University, Poland, in 1974 and Ph.D. in Electrical Engineering from the University of Rochester, N.Y. in 1983. From 1983 to 1986 he worked at GTE Laboratories on the silicon compilation project. He joined the University of Massachusetts in 1987, where he teaches and conducts research in the area of electronic design automation, and specifically in synthesis, optimization and verification of VLSI systems.

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