Towards a Trusted IC Life-Cycle

Berk Sunar, Department of Electrical and Computer Engineering, WPI, Worcester, MA, USA

Abstract: In the last decade we have witnessed a tremendous growth in the volume and variety of new electronic devices, e.g. cell phones, PDAs, mobile phones, smart and access cards etc. These new platforms are the basis of many new business models and require various levels and types of trust. On the other hand, the commonly used idealized attack model which limits the adversary to have oracle access to the device is no longer valid. At the beginning of its life cycle the integrated circuit (IC) assembled into the device may be compromised by its manufacturer. After distribution to end users, the attacker may obtain the device and recover secret information hidden inside the IC, from data leaked through its side-channels, e.g. execution time, power consumption, EM, acoustic or temperature profiles. Even if there are countermeasures, the attacker may introduce faults by subjecting the IC to extreme operating conditions to trick the implementation to reveal sensitive information. The attacker may have free access to the device if improperly disposed at the end of it's life cycle How can we cope with the growing threat of physical attacks?

In this talk we briefly summarize the threats and present several countermeasures proposed for establishing trust in the life-cycle of ICs. Specifically, we outline a technique that uses digital IC fingerprinting to detect trapdoors placed into the IC by the manufacturer. We outline a technique based on non-linear codes for building highly reliable cryptographic architectures with strong error detection capabilities. Finally, we present a fault resilient true random number generator design.

About the speaker: Berk Sunar received his B.S. (1995) degree in Electrical and Electronics Engineering from Middle East Technical University. He completed his doctoral studies in the Department of Electrical and Computer Engineering at Oregon State University, and received his Ph.D. degree in December 1998. After briefly working as a member of the research faculty at Oregon State University, Sunar has joined Worcester Polytechnic Institute as an Assistant Professor.

Sunar's research interests include high-speed computer arithmetic for finite fields and elliptic curve cryptography, computer architecture, and error control codes. His recent research interests are fast implementations of elliptic curve cryptosystems based on GF(2^k) and GF(p) arithmetic, high-speed implementation of the RSA and DSA algorithms for the MMX technology, and design of low-complexity hardware multipliers for GF(2^k) arithmetic.