Fault-Tolerant MultiLevel-Logic Decoder for Nanoscale Crossbar Memory Array

Haykel Ben Jamaa, Integrated Systems Laboratory, EPFL-IC-ISIM-LSI, Lausanne

Abstract: Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this talk, we present a way to reduce the decoder size and keep it defect tolerant by using multiple threshold voltages (VT), which is enabled by the underlying technology, gate-all-around Silicon nanowire field effect transistors. We define two types of multi-valued decoders and we model the defect they undergo due to the VT variation. Multivalued hot decoders and n-ary reflexive decoders have different defect-tolerance degrees and still permit the addressing of wires even under severe conditions. We show that there are many combinations of decoder type and number of VT's yielding equal effective memory capacities. The optimal choice saves area up to 24%. We also show that the precision of the addressing voltages for decoders with unreliable VT's is a crucial parameter for the decoder design and permits a large saving in memory area.

About the speaker: Haykel Ben Jamaa is a PhD student in the Laboratory of Integrated Systems since September 2005. He graduated from the "Technishe Universität München" ( Germany ) and from the "Ecole Centrale Paris" ( France ) in the field of Electrical Engineering. During his studies, Haykel Ben Jamaa had several industrial experiences and overseas activities (Design of modules for the DNA chips at Infineon Munich; Development of laser sensitive CNT FETs at Max-Planck-Institut Stuttgart...). He's currently working on the design challenges for nanoelectronics with a focus on hybrid systems. His work covers manufacturing aspects of crossbar memories as well as reliable system design and architecture.