May 16, 2007

Queuing Theory, Network Connections and Street Junctions

Francesco Zanini, Advanced Learning and Research institute, University of Lugano

Abstract: Interconnections in integrated circuits do not scale with technology. In coming years this problem will represent the main limitation to performance of integrated circuits. In addition, the scene has moved to Multi-Processor System-on-Chip and the number of required connections inside a single chip is exponentially growing.

In this talk the author tries to give a different perspective to the problem of on chip communications. This new point of view draws a parallel between street networks and data networks. TDMA (traffic lights crossroads) and Token ring (roundabout) protocols are studied using this new approach and a MATLAB based tool is developed in order to optimize them. This tool in fact given the input load and the transmission speed of the packets is a useful instrument to optimize both protocols without any additional hardware components.

About the speaker: Francesco Zanini was born on the 10th of October 1981 in Quistello(MN), Italy. After a "diploma di maturità scientifica" degree he joined the faculty of Electronic Engineering of the University of Parma, Italy. In 2003 he was the first student of his program to receive the "Laurea" degree with a final mark of 110/110 "cum laude". In 2005 he received the "Laurea Specialistica" degree with a final mark of 110/110 "cum laude". He was the only student to be graduated from the program that year in the University of Parma. From September 2005 to September 2006 he joined as a researcher the Institute of Microelectronics and Wireless Systems associated to the National University of Ireland. There he worked on post-processing techniques to improve non-idealities of analog electronics in high-speed, high resolution ADC systems. He is currently at the Advanced Learning and Research Institute in Switzerland.

His research interests include design methodologies and architectures for embedded systems, digital post-processing techniques to overcome limitation of analog systems, RFIDs, on-chip multiprocessors, and networks on-chip.


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