Reconfigurable Logic Architectures based on Disruptive Technologies

Pierre-Emmanuel Gaillardon, LETI, Grenoble, France

For the last four decades, the semiconductor industry has witnessed an exponential growth in accordance with Moore’s Law. According to the ITRS, as we advance into the era of nanotechnology, the traditional CMOS electronics will reach its physical and economical limits within a decade. In the electrical engineering field, while the use of reconfigurable architectures is suited to reduce
the production costs and increase the circuits regularity, it is of fundamental importance to explore novel design opportunities given by the emerging technologies, as well as the required CAD tools.

The first part of the talk will focus on the traditional FPGA architecture scheme, and will survey some structural improvements brought by disruptive technologies. The performance of the logic circuits can be improved by leveraging properties inherent to the technology, such as the crossbar organization or the controllable polarity of carbon electronics. Furthermore, while the memories and routing structures occupy the major part of the FPGAs total area and limit mainly the performances, the question of their integration will be raised. 3-D integration technologies appear as a good candidate to embed all this circuitry into the metal layers. Back-End compatible resistive memories, monolithic 3-D process flow and prospective vertical FETs process flow will be discussed.

The second part of the talk will present some novel architectural schemes for ultrafine grain computing. Considering the granularity of the logic elements, specific fixed and incomplete interconnection topologies are required to prevent the large overhead of a configurable interconnection pattern. To explore the potentiality of this new architectural scheme, specific EDA tools are required. A specific benchmarking flow, suited to the ultra-fine grain exploration, will be presented in order to explore the considered architecture and design tools.

About the speaker:

Pierre-Emmanuel Gaillardon was born in Bourg-de-Péage, France, in 1985. He received his engineering degree in electronics from CPE-Lyon, France, and the M.S. degree from INSA Lyon, France, in 2008. He joined CEA-LETI in autumn 2008 as a Ph.D. student.

His research activities and interests are currently focused on reconfigurable processing architectures based on emerging devices.

more...