Go to
May 16, 2007
Queuing Theory, Network Connections and Street Junctions
Francesco Zanini, Advanced Learning and Research institute, University of Lugano
Abstract: Interconnections in integrated circuits do not scale with technology. In coming years this problem will represent the main limitation to performance of integrated circuits. In addition, the scene has moved to Multi-Processor System-on-Chip and the number of required connections inside a single chip is exponentially growing.
In this talk the author tries to give a different perspective to the problem of on chip communications. This new point of view draws a parallel between street networks and data networks. TDMA (traffic lights crossroads) and Token ring (roundabout) protocols are studied using this new approach and a MATLAB based tool is developed in order to optimize them. This tool in fact given the input load and the transmission speed of the packets is a useful instrument to optimize both protocols without any additional hardware components.
About the speaker: Francesco Zanini was born on the 10th of October 1981 in Quistello(MN), Italy. After a "diploma di maturità scientifica" degree he joined the faculty of Electronic Engineering of the University of Parma, Italy. In 2003 he was the first student of his program to receive the "Laurea" degree with a final mark of 110/110 "cum laude". In 2005 he received the "Laurea Specialistica" degree with a final mark of 110/110 "cum laude". He was the only student to be graduated from the program that year in the University of Parma. From September 2005 to September 2006 he joined as a researcher the Institute of Microelectronics and Wireless Systems associated to the National University of Ireland. There he worked on post-processing techniques to improve non-idealities of analog electronics in high-speed, high resolution ADC systems. He is currently at the Advanced Learning and Research Institute in Switzerland.
His research interests include design methodologies and architectures for embedded systems, digital post-processing techniques to overcome limitation of analog systems, RFIDs, on-chip multiprocessors, and networks on-chip.
Download visuals (1.1 MB pdf)
Secondary navigation
- January 29, 2018
- August 30, 2017
- Past seminars
- 2016 - 2017 Seminars
- 2015 - 2016 Seminars
- 2014 - 2015 Seminars
- 2013 - 2014 Seminars
- 2012 - 2013 Seminars
- 2011 - 2012 Seminars
- 2010 - 2011 Seminars
- 2009 - 2010 Seminars
- 2008 - 2009 Seminars
- 2007 - 2008 Seminars
- 2006 - 2007 Seminars
- August 31, 2007
- June 29, 2007
- June 20, 2007
- June 5, 2007
- May 30, 2007
- May 16, 2007
- May 15, 2007
- April 24, 2007
- March 27, 2007
- March 14, 2007
- February 9, 2007
- February 8, 2007
- January 12, 2007
- December 5, 2006
- November 14, 2006
- October 31, 2006
- October 27, 2006
- October 26, 2006
- October 20, 2006
- September 20, 2006
- September 20, 2006
- September 20, 2006
- September 19, 2006
- 2005 - 2006 Seminars
- August 23, 2006
- August 22, 2006
- June 26, 2006
- June 20, 2006
- June 16, 2006
- June 7, 2006
- June 6, 2006
- May 30, 2006
- May 17, 2006
- May 10, 2006
- April 27, 2006
- April 12, 2006
- March 31, 2006
- March 29, 2006
- March 22, 2006
- March 15, 2006
- February 27, 2006
- February 8, 2006
- January 25, 2006
- January 19, 2006
- January 18, 2006
- January 17, 2006
- January 11, 2006
- November 30, 2005
- November 23, 2005
- November 2, 2005
- October 26, 2005
- October 25, 2005
- October 5, 2005
- September 28, 2005
- 2005 Seminars