A Methodology for A-Priori Statistical Analysis of Functional Fault-Tolerance of Nanometer-Scale Digital Systems

Milos Stanisavljevic, PhD Assistant at EPFL-STI-LSM

Abstract: This work presents a new approach for monitoring and estimating device reliability of nanometer-scale devices prior to fabrication. The presented approach is equally applicable to novel nano-scale quantum devices (single-electron transistors and silicon nanowires), as well as to failure-prone nanometer scale CMOS devices. A four-layer architecture exhibiting a large immunity to permanent as well as random failures is used. A complete tool for a-priori functional fault tolerance analysis was developed. It is a conceptually new realization of statistical, Monte Carlo based, tool that induces different failure models, and does subsequent evaluation of system reliability under realistic constraints. Analysis of distinctive cases and topologies is performed. A structured fault modeling architecture is also proposed, which, together with the tool, is part of the new reliability design method representing a compatible improvement of existing IC design methodologies.

About the speaker: Milos Stanisavljevic graduated from the University of Belgrade with a degree in Electronics Engineering in April 2004. Currently he is a PhD assistant at the Microelectronic Systems Laboratory, EPFL. Milos has received various awards in national competitions on physics and mathematics. Most recently he won the first place in an international electronics competition of students from Yugoslavia and Serbia in 2002. His research interests include reliability of nanometer-scale systems.

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