May 4, 2011

Temperature-aware runtime power management in 3-D MPSoC

Kyungsu Kang, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea

Abstract: With increasing system integration as a result of device scaling (for 2D dies) and 3D integration, chip power density in microprocessors is expected to exponentially increase every year. Because power consumed by the microprocessors is converted into heat, the corresponding high power density (i.e., power dissipation per unit volume) incurs many temperature-related problems in reliability, power, performance, and manufacturing cost. In this talk, temperature-aware power management methods (e.g., voltage and frequency scaling, power gating, and thread scheduling) are being introduced in order to address the temperature-related issues, especially focusing on the energy saving and the performance improvement, respectively.
 
About the speaker: Dr. Kyungsu Kang has received the combined degrees of M.S. and Ph.D degree in the Department of Electrical Engineering and Computer Science from the Korean Advanced Institute of Science and Technology (KAIST)  in 2010. He is currently with KAIST as a postdoc since 2010. His research interests include dynamic power and thermal management for both 2-D and 3-D chip multiprocessor.