Statistical Design Issues and Tradeoffs in On-Chip Interconnects

Wayne Burleson, Department of Electrical and Computer Engineering, University of Massachusetts Amherst, MA - USA

Abstract: Interconnects play an increasing role in all aspects of VLSI design, ranging from critical timing paths, to significant aspects of the area/power/energy budget, reliability and security issues, and an increasing portion of the overall design and verification effort. With technology advances has come increasing uncertainty in the form of process, temperature, voltage and workload variations. Statistical approaches have become necessary in most aspects of design in order to predict costs, performance and reliability measures. This talk reviews recent advancements in this area focusing on tradeoffs in on-chip interconnects. New unified methods of analysis are proposed as well as architectural and circuit-level methods for mitigating the impact of statistical variation. This work is funded by the SRC and Intel.

About the speaker: Wayne Burleson is a Professor of Electrical and Computer Engineering at the University of Massachusetts Amherst where he has been since 1990. He has a BSEE and MSEE from MIT and a PhD in ECE from the University of Colorado. He has worked as a custom chip designer for VLSI Technology and Fairchild and as a consultant for Digital, Compaq/HP, Intel, Datafusion and Tensorcomm. He was a visiting professor at ENST/Paris in 1996/97 and at LIRM Montpellier in 2003. His research is in the general area of VLSI, including circuits for low-power, long interconnects, clocking and mixed signals with funding from NSF, SRC, Compaq/HP and Intel. He also conducts research in reconfigurable computing, content-adaptive signal processing, embedded security, smart cards and multimedia instructional technologies. He has published over 100 refereed publications in these areas. He is a member of the ACM, ASEE, Sigma Xi, a senior member of the IEEE and chairs the IEEE Signal Processing Society Technical Committee on Design and Implementation of Signal Processing Systems.