Reconfigurable Nanowire Electronics – Towards a Dopant Free Single MOS Technology

Friday, 11 September 2015 at 15:00 in INF 328

Walter Weber, NaMLab and CfAED at TU Dresden, Dresden, Germany

 

Abstract:

Semiconductor nanowire transistors are considered successors of finFETs providing the ultimate miniaturization capabilities of MOS transistors targeting an even higher circuit complexity and performance. A promising perspective for further advancement beyond classical CMOS scaling is to exploit functionality enhancement of the elementary computing units. Several nanowire based multi-gated device concepts known as reconfigurable field effect transistors (RFETs) [1,2] and polarity control (PC) FETs [3] that combine multi- functionality with the inherent advantages of silicon nanowires are being currently evaluated. These four-terminal devices merge unipolar n- and p- FET switching characteristics from the same device as selected simply by an electric signal and without the need for doping enabling complementary CMOS operation with a single kind of transistor. RFETs make use of two sharp NiSi2 / intrinsic-silicon interfaces with individual gates for the selective injection of electrons and holes into the channel region [4,5]. In order to allow complementary circuit operation symmetry in the p- and n-type I-V characteristics is mandatory. To this end, the application of radially compressive strain to <110> oriented silicon nanowires is able to align the injection efficiency of electrons and holes [6]. Full swing complementary operating circuits are shown with symmetric RFETs [7]. Multi-functionality is used to synthesize circuits with lower transistor count and to reduce power consumption as compared to conventional CMOS [8,9]. We will analyze the prospects of enhanced devices and circuits with the use of novel materials.

[1] A. Heinzig, et al. Nano Letters 12, pp 119-124 (2012)
[2] W. M. Weber et al. IEEE Proc. Nanotechnology Conf. pp 580-581 (2008)
[3] M. De Marchi, et al. IEDM Tech Digest 8.4.1 - 8.4.4 (2012)
[4] D. Martin, et a. Physical Review Letters 107, 216807 (2011)
[5] D.-Y. Jeon et al. Nano Letters 15, pp 4578-4584 (2015)
[6] T. Baldauf et al. IEEE Electron Device Letters DOI: 10.1109/LED.2015.2471103 (2015)
[7] A. Heinzig, et al. Nano Letters 13, pp 4176–4181 (2013)
[8] J. Trommer et al. IEEE Electron Device Letters. 35, 141 (2014)
[9] J. Trommer et al. IEEE Transactions Nanotechnology 35, 689-698 (2015)

 

About the speaker:

Dr. Walter Weber studied Electrical Engineering at the TU Munich and received his PhD in Electrical Engineering from the same university in 2007. From 2002 till 2004 he worked at the Infineon AG - Corporate Research Laboratories in Munich in the group of L. Risch developing technology for different types of nanometer scale double-gate transistors including finFETs, multi-bit trigate flash cells and planar double gate FETs.
From 2004 until 2008 he performed his PhD research at the Infineon AG and Qimonda AG - Materials Research Department under the supervision of Prof. F. Kreupl, Prof. H. Riechert and Prof. P. Lugli. His focus was on the synthesis of nanowires heterostructures and the conception of novel nanowire based transistors with programmable polarity.

Since 2008 he is a Senior Scientist at Namlab gGmbH leading activities on Beyond-CMOS emerging devices and circuits. In parallel, since 2013 he is also acting as a Research Group Leader at the excellence cluster CfAED at TU Dresden.