A Fast Evaluation-based Design Methodology for Emerging Technologies

Pierre-Emmanuel Gaillardon, Integrated Systems Laboratory, Swiss Federal Institute of Technology, Lausanne, Switzerland

Abstract: For the last four decades, the semiconductor industry has experienced an exponential growth. According to the ITRS, as we advance into the era of nanotechnology, the traditional CMOS electronics is reaching its physical and economical limits. The main objective of this talk is to present a novel design methodology for reconfigurable architectures using emerging technologies. The main idea is to provide a fast evaluation of the interest of a technology from an architecture perspective. Such a technology-design co-integration breaks the traditional scheme, in which a technology must be fully optimized and characterized before any design attempts.

The first part of the talk will focus on the traditional FPGA architecture scheme, and survey some structural improvements brought by disruptive technologies. While the memories and routing structures occupy the major part of the FPGAs total area and mainly limit the performances, 3-D integration appears as a good candidate to embed all this circuitry into the metal layers. Configuration and routing circuits based on back-end compatible resistive memories, a monolithic 3-D process flow and a prospective vertical FETs process flow are introduced and assessed within a complete architectural context.

The second part of the talk will present some novel architectural schemes for ultra-fine grain computing. The size of the logic elements can be reduced thanks to inherent properties of the technologies, such as the crossbar organization or the controllable polarity of carbon electronics. Considering the granularity of the logic elements, specific fixed and incomplete interconnection topologies are required to prevent the large overhead of a configurable interconnection pattern. To evaluate the potentiality of this new architectural scheme, a specific benchmarking flow will be presented in order to explore the ultra-fine grain architectural design space.
 

About the speaker: Pierre-Emmanuel Gaillardon was born in Bourg-de-Péage, France, in 1985. He received his engineering degree in electronics from CPE-Lyon, France, and the M.S. degree from INSA Lyon, France, in 2008.  He joined CEA-LETI in Autumn 2008 as a Ph.D. student under the supervisation of Prof. Ian O'Connor and Dr. Fabien Clermidy. He received his PhD degree  from the University of Lyon in 2011.

As of October 2011, he is working as a post-doctoral researcher with Prof. Giovanni De Micheli at the Integrated Systems Laboratory of EPFL. He is involved in the Nanosys project and his research interests are currently focused on reconfigurable processing architectures based on emerging devices.