Temperature-Aware Processor Frequency Assignment for MPSoCs Using Convex Optimization

Srinivasan Murali, Integrated Systems Laboratory, EPFL-ISIM-IC-LSI, Lausanne

Abstract: The increasing processing capability of Multi-Processor Systems-on-Chips (MPSoCs) is leading to an increase in chip power dissipation, which in turn leads to significant increase in chip temperature. Uneven thermal profiles in an MPSoC can cause transient reduction in overall system performance, unreliable timing delay variations, or even permanent damages in the devices. An important challenge facing the designers is to achieve the highest performance system operation that satisfies the temperature and power consumption constraints. The frequency of operation of the different processors and the application workload assignment play a critical role in determining the performance, power consumption and temperature profile of the MPSoC. In this talk, I will present novel convex optimization based methods that solve this important problem of temperature-aware processor frequency assignment, such that the total system performance is maximized and the temperature and power constraints are met. I will first show how the methods can be applied when the application workload patterns are known statically. Then, I will show how they can be applied when the workload changes dynamically. I will present case-studies on several realistic MPSoCs, which show that the methods result in designs that satisfy the temperature constraints at all time instances of operation.

About the speaker: Dr. Srinivasan Murali is a post-doctoral research scientist at the Integrated Systems Lab (LSI) at EPFL. He received the MS and PhD degrees in Electrical Engineering from Stanford University in 2007.

His research interests include interconnect design for Systems on Chips, with particular emphasis on developing CAD tools and design methods for Networks on Chips. His interests also include thermal modeling and reliability of multi-core systems. He has been actively involved in several conferences (such as DATE, CODES-ISSS, NoC symposium) as session/publicity chair and is a reviewer for many leading conferences and journals. He recently received a best paper award in the DATE 2005 conference for his work on interconnect architecture design and he has over 25 publications in this field.

Presentation slides with audio