Soft Error Rate Estimation in Digital Circuits

Mahdi Fazeli, Dependable System Laboratory, Department of Computer Engineering, Sharif University of Technology, Tehran, Iran

Abstract: The aggressive device scaling and exponential increase in transistor counts on a chip have increasingly made the modern integrated circuits more susceptible to radiation-induced transient errors (also called soft errors) caused by neutrons and alpha particles. These errors are making a significant impact in the microelectronics industry. Both experiments and analytical models show that in addition to SRAMs and DRAMs, latches, flip-flops, and combinational logic are now sensitive to cosmic rays at terrestrial levels. Accurate estimation of soft error rate (SER), i.e., the probability of system failure due to soft errors, is a key factor in the design of cost-effective soft error resilient systems. Logic derating, electrical derating, and timing derating are three major components affecting circuit SERs. While electrical derating of logic gates can be computed using library characterization and the fan-out load of logic gates, the other two derating factors are variant for each design and input vectors and are very difficult to estimate. Previous SER estimation methods have mostly been based on fault injection and fault simulation which are usually time-consuming and inaccurate. In this presentation, I will introduce fast and accurate techniques based on enhanced static timing analysis, waveform propagation rules, and signal probabilities to estimate the soft error rate of digital circuits. The proposed techniques compute logical, electrical, and timing derating factors orders of magnitude faster than statistical fault injection (SFI) techniques while having high level of accuracy. This level of fastness and accuracy makes the proposed techniques viable solutions to measure the SER of very large size circuits used in industry. As future work, I will explain how the proposed approaches can be employed to model the error propagation at system level.

About the speaker: Mahdi Fazeli received his undergraduate degree from University of Isfahan. He is currently pursuing his PhD degree at the Dependable System Laboratory in the Department of Computer Engineering of the Sharif University of Technology in Tehran, Iran. His research interests include:

    •    Dependable Embedded Systems Design.
    •    Reliability Evaluation of Systems using both Analytical and Experimental Approaches.
    •    Reliability Issues in Deep Submicron Technologies.
    •    Radiation Effects in VLSI Circuits.
    •    Low Power Circuit Design.
    •    Wireless Sensor Network