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More Moore: Designing Ultra-Complex System-on-Chips
Workshop, 22 March 2013, EPFL, MXF1
Organized by:
Giovanni De Micheli (EPFL) and Heinrich Meyr (Visiting Professor, EPFL)
The continuing pursuit of "Moore's Law" in semiconductor industry for more than 40 years is presenting increasingly more significant challenges for high-complexity systems and products, including:
- Unsustainable power dissipation
- Near-atomic scale dimensions - physical limits
- Increasing process and device variability
- Diminishing performance increase with scaling
- Lack of appropriate design tools and environments
- Excessive R&D and manufacturing costs
“More Moore” activities aim to improve CMOS performance for the 22nm node technology and beyond. The outcomes should be applicable both in pushing forward highly scaled devices and as technology boosters that allow longer life to existing geometries.
This workshop views the design of ultra-complex system-on-chip from different angles. Three distinguished speakers from industry will present their views:
Joachim Kunkel, Senior Vice President and General Manager, Solutions Group, Synopsys Inc
Michael Speth, Intel, Germany
Ravi Subramanian, President & CEO, Berkeley Design Automation
Workshop talk schedule is given below. Please follow the links given for talk titles and abstracts. Click here to download the schedule pdf. The workshop talks and panel discussion have been video taped. Links to the recordings are given on each speaker's page. To watch the video recordings just follow the links given below in the schedule.
22 March 2013, EPFL, Room MXF1 |
|
8:45 - 9:00 | Coffee & croissants |
9:00 - 9:05 |
Opening Remarks |
9:05 - 9:45 |
Designing Analog/Mixed-Signal IP Beyond the 28 nm Process Technology Node Joachim Kunkel |
9:45 - 10:00 |
Q & A session |
10:00 - 10:40 |
Trends and Challenges in Wireless SOC Design Michael Speth |
10:40 - 11:00 |
Q & A session |
11:00 - 11:40 |
More Moore: Does it mean Mixed-Signal Integration or Disintegration Ravi Subramanian |
11:40 - 12:00 |
Q & A session |
12:00 - 12:30 |
Panel Discussion |
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- VENUE
- Panel on Circuits in Emerging Nanotechnologies
- Panel on Emerging Methods of Computing
- Panel on The Role of Universities in the Emerging ICT World
- Panel on Design Challenges Ahead
- Panel on Alternative Use of Silicon
- Nano-Bio Technologies for Lab-on-Chip
- Functionality-Enhanced Devices Workshop
- More Moore: Designing Ultra-Complex System-on-Chips
- Design Technologies for a New Era
- Nanotechnology for Health
- Secure Systems Design
- Surface Treatments and Biochip Sensors
- Security/Privacy of IMDs
- Nanosystem Design and Variability
- Past Events Archive
Registration
Registration is required to attend the workshop and is free of charge. Please click HERE to complete the online registration form.
You may contact anil.leblebici@epfl.ch with questions about the workshop.