Application-Specific Design Customization for Network-on-chip Architectures

Gianluca Palermo, Department of Electronics and Information Technology, Politechnical University of Milan, Italy

Abstract: The scalability and the success of switch-based networks and packet-based communication in parallel computing have inspired the researchers to propose the Network-on-Chip (NoC) architecture as a viable solution to the complex on-chip communication problems.

Since most NoC architectures are specifically developed either for one embedded application or as a platform for a small class of applications, customized network-oriented communication architectures have recently become a must to support high bandwidth SoCs. To this end, a corresponding communication design flow is necessary to support the design space exploration of complex SoCs with tight design constraints.

In this talk we present our application-oriented design flow and some experimental results carried out applying the methodology to STNoC, the Network on-Chip developed by STMicroelecronics.

About the speaker: Gianluca Palermo received the M.S degree in Electronic Engineering, in 2002, and the Ph.D degree in Computer Science, in 2006, from Politecnico di Milano. He is currently a Post Doc at Department of Electronics and Information Technology in the same University. Previously he was also a consultant engineer in the Low Power Design Group of AST - STMicroelectronics working on network on-chip.

His research interests include design methodologies and architectures for embedded systems, focusing on power estimation, on-chip multiprocessors and networks on-chip.

 

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