Giovanni De Micheli

  1. P.E. Gaillardon, X. Tang, G. Kim, G. De Micheli and E. Giacomin Resistive Random Access Memory based Multiplexers and Field Programmable Gate Arrays. U.S. Patent No. 10'348'306 B2, 2018.
  2. P.E. Gaillardon, L. Amaru and G. De Micheli Majority Logic Synthesis. U.S. Patent No. 10,394,988 B2, 2018.
  3. L.Amaru, P.E. Gaillardon and G. De Micheli Boolean Logic Optimization in Majority Inverter Graphs. U.S. Patent No. 10,380,309 B2, 2018.
  4. X.Tang, P.E. Gaillardon and G. De Micheli Pattern-based FPGA logic block and clustering algorithm. U.S. Patent No. 9,971,862 B2, 2018.
  5. G.Amaru', P.E. Gaiilardon and G. De Micheli Method for speeding up Boolean satisfiability. U.S. Patent No. 9,685,959 B2, 2017.
  6. D. Sacchetto, S. Bobba, P.E. Gaillardon, Y. Leblebici, G. De Micheli and T. Demirci Resistive switching element and use thereof. U.S. Patent No. 9412940 B2, 2016.
  7. P.E.Gaillardon, X/ Tang and G.De Micheli, High-performance low-power near-Vt resistive memory-based FPGA US patent 9276573 B2, 2016.
  8. G.De Micheli,Y. Leblebici, M. De Marchi and D. Sacchetto, Ambipolar silicon nanowire field effect transistor US patent 9252252 B2, 2016.
  9. L.Amaru', P.E.Gaillardon and G.De Micheli, Controllable-polarity FET based arithmetic and differential logic US patent 9130568 B2, 2015.
  10. F. Angiolini, D. Atienza and G. De Micheli Method to manage the load of peripheral elements within a multicore system. US patent 7995599, 2011.
  11. S. Murali, L. Benini and G. De Micheli. Method to design network-on-chip (NOC)-based communication systems. US patent 8042087, 2009.
  12. K. Sato, L. Semeria and G. De Micheli. Resolution of Dynamic Memory Allocation/Deallocation and Pointers. US patent 6467075, 2002.
  13. G. De Micheli, Electronic alarm system, Chamber of Commerce of Milano No.986637, 1975, Italy.