May 27, 2013

When Perfect is the Enemy of Efficient: Using Controlled Errors in Approximate Computing

Monday, 27 May 2013 at 16h15 in INF 328

Michael Orshansky, Department of Electrical and Computer Engineering, University of Texas at Austin

 

Abstract:

Recently there has been increased interest in approximate computing due to its potential to achieve large energy savings. This talk first describes our work on enabling low-level approximate computation and development of design principles for energy-optimal approximate (“sloppy”) addition. We identify a fundamental trade-off between error frequency and error magnitude in a timing-starved adder and introduce a formal model to prove that for signal processing applications reducing bit-wise error frequency is sub-optimal. We also show how error can be reduced by conditional bounding logic for lower significance bits. We then describe our recent work on synthesizing a minimum-cost approximate Boolean network whose behavior deviates in a well-defined manner from a specified exact Boolean function. We establish that the approximate synthesis problem un-constrained by the frequency of errors is isomorphic with the Boolean relations (BR) minimization problem and use recently developed fast algorithms for BR to solve it. We further introduce an efficient heuristic algorithm for iteratively refining the magnitude-constrained solution to arrive at a solution also satisfying the error frequency constraint. In the last part of the talk, we show how the existence of an intrinsic notion of quality floor present in typical digital signal processing circuits can be used to reduce their energy consumption by strategically accepting some runtime errors under scaled supply voltage. The introduced innovations include techniques for carefully controlling possible errors and exploiting the specific patterns of errors for low-cost post-processing to minimize image quality degradation.
 
About the speaker: Michael Orshansky is an Associate Professor of Electrical and Computer Engineering at the University of Texas, Austin. He received his Ph.D. degree in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 2001. Prior to joining UT Austin, he was a Research Scientist and Lecturer with the Department of EECS at UC Berkeley. His research interests include low-power design, approximate computing, design optimization for robustness and manufacturability, and statistical analysis and design methods. He is the recipient of the National Science Foundation CAREER award for 2004 and ACM SIGDA Outstanding New Faculty Award in 2007. He received the 2004 IEEE Transactions on Semiconductor Manufacturing Best Paper Award, as well as Best Paper Awards at the Design Automation Conference 2005, International Symposium on Quality Electronic Design (ISQED) 2006, and International Conference on Computer-Aided Design (ICCAD) 2006. He is the co-author of the book “Design for Manufacturability and Statistical Design: A Constructive Approach.”