** Synthesis and Optimization of Digital Circuits ** offers a modern, up-to-date look
at computer aided design (CAD) of very large scale integration (VLSI) circuits.
In particular, this book covers techniques for synthesis and optimization
of digital circuits at the architectural and logic levels, i.e., the generation
of performance- and/or area-optimal circuit representations from models
in hardware description languages. The book provides a thorough explanation
of synthesis and optimization algorithms accompanied by a sound mathematical
formulation and a unified notation.

The text covers the following topics:

- modern hardware description languages (e.g. VHDL, Verilog).
- architectural-level synthesis of data flow and control units, including algorithms for scheduling and resource binding.
- combinational logic optimization algorithms fro two-level and multiple-level circuits.
- sequential logic optimization methods.
- library binding techniques, including those applicable to FPGAs.

An

A new set of powerpoint slides for courses using the book.

Latex-based foils for overhead projection.

Reduced-dimension copies of overheads.

Errata/Corrige. A list of corrections to errors appearing in the 4th print. If your copy is a third or earlier print, you should order a copy of the 4th print.